IEEE

FPGA IP Core for DC Motor Control With Adaptive Neural Network PID Tuning, and High ...

Abstract: Traditional proportional integral derivative (PID) falls short for precise control of DC motor speed under changing conditions. This paper presents a novel FPGA based IP (intellectual ...
IEEE

PipeFL: Hardware/Software co-Design of an FPGA Accelerator for Federated Learning

Abstract: Federated learning has solved the problems of data silos and data fragmentation on the premise of satisfying privacy. However, cryptographic algorithms in federated learning brought ...