IEEE

PipeFL: Hardware/Software co-Design of an FPGA Accelerator for Federated Learning

Abstract: Federated learning has solved the problems of data silos and data fragmentation on the premise of satisfying privacy. However, cryptographic algorithms in federated learning brought ...
IEEE

DFX: A Low-latency Multi-FPGA Appliance for Accelerating Transformer-based Text Generation

Abstract: •DFX: a low-latency multi-FPGA appliance for accelerating transformer-based text generation–DFX is a multi-FPGA appliance that accelerates transformer-based text generation–DFX adopts model ...